Add xsimd::get<>() for optimized compile-time element extraction#1294
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DiamonDinoia wants to merge 2 commits intoxtensor-stack:masterfrom
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Add xsimd::get<>() for optimized compile-time element extraction#1294DiamonDinoia wants to merge 2 commits intoxtensor-stack:masterfrom
DiamonDinoia wants to merge 2 commits intoxtensor-stack:masterfrom
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Nice thanks for fixing CI! This is ready for review. Once approved I will rewrite the history. I don't want to trigger a useless CI run. |
serge-sans-paille
requested changes
Apr 16, 2026
| void check_get_all(batch_type const& res, std::index_sequence<Is...>) const | ||
| { | ||
| int dummy[] = { (check_get_element<Is>(res), 0)... }; | ||
| (void)dummy; |
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you could check that loading the generated array ends up being equal to res, right?
serge-sans-paille
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Apr 17, 2026
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Please fix the testing so that we have a decent confidence in the getter when index != 0
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Yes, I will! I also noticed some smalle changes I should make. I just did not have time to get to this still. |
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Adds a new public API `xsimd::get<I>(batch)` that extracts a compile-time
indexed lane from a batch. Unlike the runtime `batch::get(i)`, the index is
a template parameter so each arch can dispatch to the best single-op path.
Design per architecture (objdump-verified, pure -march flags, no reliance
on compiler optimization):
- SSE2: `first` for I==0; 32/64-bit (int, float, double) go through
`swizzle + first` so the xsimd permute API emits the shuffle; 8/16-bit
stay on `psrldq + movd` because sse2 swizzle expands to 2 ops for
broadcast-to-lane-0 (pshuflw/pshufhw + unpck) while srli keeps it at 1.
- SSE4.1: native `pextrb/w/d/q` for integer (1 op); float override removed
so it falls through to sse2's swizzle path (equivalent 1-op codegen).
- AVX/AVX2: half-extract + delegate to sse4_1 (1 op low half, 2 ops upper
half — hardware lower bound).
- AVX-512F: `valignd`/`valignq` rotate + extract for float/double — 1 op
for every I, including upper half (was 2). Integer keeps the extract +
pextr* split (2 ops, optimal).
- NEON/NEON64: native per-lane `mov`/`umov v.X[I]` (1 op).
- RVV: skip `vslidedown` when I==0.
Tests build `array_type { xsimd::get<Is>(res)... }` via pack-initialization,
compare against the reference array, and verify that reloading the extracted
values reproduces the original batch.
Verified on sse2, sse4.1, avx2, avx-512 (sde), aarch64 (qemu), rvv (qemu).
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Add a free function xsimd::get(batch) API mirroring std::get(tuple) for fast compile-time element extraction from SIMD batches.
Per-architecture optimized kernel::get overloads using the fastest available intrinsics:
Also fixes a latent bug in the common fallback for complex batch compile-time get (wrong buffer type).