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progress: split PortConnectivity into bitset + sparse map#799

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progress: split PortConnectivity into bitset + sparse map#799
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antiguru:portconnectivity-bitset

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Most operator edges carry the identity summary. Represent those implicitly via a per-input SmallVec<[u64; 2]> bitset and reserve the BTreeMap for non-default antichains. Inline storage covers up to 128 output ports without heap allocation.

On event_driven 100 × 1000, max RSS drops 528 → 434 MB (−17.9%) and dataflow construction time drops ~15%. Profile shows the hot path is unchanged — runtime loops iterate the same columnar tracker storage; PortConnectivity methods total 0.07% of samples.

Most operator edges carry the identity (default) summary. Represent
those implicitly via a per-input `SmallVec<[u64; 2]>` bitset and reserve
the `BTreeMap` for non-default antichains. Inline storage of the bitset
covers up to 128 output ports without heap allocation.

For the `event_driven` example with 100 dataflows of 1000 maps each,
max RSS drops from 528 MB to 434 MB (-17.9%), and dataflow construction
time drops ~15%. Profile shows zero hot-path overhead: PortConnectivity
methods total 0.07% of samples; runtime loops iterate the unchanged
columnar storage.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
@antiguru antiguru force-pushed the portconnectivity-bitset branch from 9d4d380 to 134800a Compare May 25, 2026 02:37
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